Claude and Codex Rank Post-Soviet and California Universities on 49 Hardware Criteria
November 1, 2026 · 2 min read
Claude Opus 5.5 and Codex Astra 6 evaluated one hundred universities across California and the former Soviet Union using a specific list of 49 criteria. The evaluation focused on digital hardware curricula, specifically those resembling the MIT 6.111 course structure. The models generated two distinct reports after processing the request over a period of two days. The ranking is intentionally unbalanced because the user expanded the list of universities from California and the former Soviet Union, while selecting only 20 representative institutions from other countries.
The evaluation criteria required universities to offer labs involving Verilog, FPGA, and student projects. The models were instructed to award points for each of the 49 modern criteria, moving away from outdated IEEE recommendations from the mid-1990s. The AI systems searched through various sources, including student repositories on GitHub, to compile the data. The models correctly interpreted the instructions to exclude universities that only presented processor topics via slides. Credit was given only if students modified pipelines, such as adding bypasses to static pipelines or modifying super-scalar back-ends, and ran the designs in RTL simulators or on FPGA boards.
Strong courses often involve partnerships with industry or other universities. YADRO is noted in Russia and Belarus, ETH Zürich in KSE, and Synopsys in Armenia. Other strong programs feature long-standing courses with open materials, such as those at MIET and Berkeley. Building a processor, typically RISC-V, is a common capstone for top courses at institutions including MIET, MIPT, SibSUTU, the University of Latvia, Berkeley, and Harvey Mudd.
The hardware used in these labs predominantly consists of Terasic boards with Intel Altera FPGAs and Digilent boards with AMD Xilinx FPGAs. Cheaper alternatives include Chinese boards with Cyclone IV, such as OMDAZZ at MEI, and Russian boards like Marshkhod and LESO at SibSUTU. Gowin Tang boards appear in the synthesis school list. Harvey Mudd is the only listed university using Lattice boards. Many sources do not specify the board, leaving that data column empty.
Public information is scarce outside Moscow, Saint Petersburg, and Baltic capitals. The absence of data in Central Asia and the Caucasus reflects limited online availability rather than a lack of teaching. Many universities end digital design education with a single course covering gates, finite state machines, and serial interfaces. Graduates often lack experience with flow control in FIFOs and credit-based systems. Verification skills are also limited, with many students using outdated testbench styles and lacking experience in formal verification or concurrent assertions. Finally, few universities provide access to ASIC tools like Synopsys Fusion Compiler or Cadence Genus, leaving students without intuition for static timing analysis or power reduction techniques.