TECH Signal 486
Work-in-progress Mitra-15 simulator for SIMH reaches compilable state with instruction decoder and basic I/O
A developer has published a preliminary SIMH simulator for the CII Mitra-15, a 1970s French 16-bit minicomputer, with a working instruction decoder and untested I/O device code.
Very little Mitra-15 software and documentation has survived, making emulation-based preservation the primary path for studying this historically significant French computing platform. The project faces a severe validation problem: the only original CII code available for testing is being reconstructed byte-by-byte from a poorly OCR'd PDF dump of the MTR real-time monitor.
Written by elseif from the cluster below · every claim links back to a sourceThe three things worth knowing
The simulator builds on openSIMH and currently compiles, but is described as a tentative effort rather than a true Mitra-15 simulator.
The instruction decoder covers all instructions and addressing modes, and branch instructions in immediate addressing mode have been tested.
The Mitra-15's notable architectural feature is peripheral programming via microcode rather than external DMA, and the project includes untested code for the CII suspension system used by DRI disks.
THE READ
What the cluster adds up to.
The project targets openSIMH and requires GCC or Clang, Make, Linux, and a recent openSIMH version. The developer started from an existing SDS 940 simulator and incrementally modified it toward Mitra-15 characteristics. The code currently compiles and provides a working SIMH environment with deposit, examine, run, and break functionality, plus a complete instruction decoder for each instruction and addressing mode.
Validation is the central challenge. The developer has never programmed on a Mitra-15 and notes that very little software or documentation has survived. The only original CII code potentially available for testing is the MTR real-time monitor, being reconstructed from a hexadecimal dump in a PDF file. The OCR output is poor enough that every byte requires visual verification, and the developer states this test's success is crucial since everything else must be inferred from documentation.
The Mitra-15's architecture differs from contemporaries in that input/output peripherals are programmed using microcode rather than an external mechanism like DMA. The project includes untested code for the CII suspension system, described as a CII invention aiming at a similar goal as modern DMA, used by DRI disks. Code for common devices like the ASR33 and line printer is written but untested, and the developer lacks documentation for many peripherals including asynchronous channels, synchronous channels, fast channel multiplexed, fast channel ADM, and IOPs.
The long-term roadmap includes porting RSX280, an RSX-11 clone, to the Mitra-15. The developer draws register analogies between the Z80 and Mitra-15 but identifies three obstacles: the Mitra-15 has fewer registers, fewer addressing modes, and no concept of a stack, which complicates managing reentrancy. A rudimentary assembler has also been created but remains untested.
Only one feed carried this event, and the Hacker News posting consisted primarily of a link to the project page with minimal discussion context. The project is explicitly labeled preliminary and work-in-progress, with the developer acknowledging the code is not yet a true simulator. The planned feature set includes system and optional instructions, memory management, interrupt and trap systems, and a range of I/O devices from printers to magnetic tape readers.
Written by elseif from the cluster below · checked for specifics the sources never containedTHE CLUSTER