AI Signal 230
Persistent State Machines: LLM Attention with INT4 In-Memory Cells
This proposes an alternative hardware architecture for transformer attention that claims extremely low dynamic power consumption, which could matter for edge deployment if the simulation-based results hold on physical hardware. However, the energy figures exclude external memory and come from tool estimates rather than board measurements, so the practical advantage remains unproven.
Written by elseif from the cluster below · every claim links back to a sourceThe three things worth knowing
The framework mathematically proves quantization error bounds and deterministic finite-automaton equivalence for attention under a bounded-logits assumption, placing the approach in DSPACE(O(n)).
A 1024-cell array on a Zynq-7000 xc7z020 showed estimated dynamic power below 1.0 mW with normalized dynamic energy of 3.81 × 10^-5 pJ/op, while a 256-cell SoC on UltraScale+ xcvu9p closed timing at 62.5 MHz using only 0.67% of logic slices and zero DSP blocks.
All energy figures are simulation-based tool estimates with no physical FPGA board measurements, and system-level external memory energy is explicitly excluded from the analysis.
THE CLUSTER