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CPython adds official RISC-V support as tier 3 platform
CPython now officially supports the RISC-V architecture as a tier 3 platform, allowing developers to build and run Python on that open ISA.
This gives engineers a verified path to run Python workloads on RISC-V hardware without relying on unofficial forks. The support rests on community testing and real-machine access provided by the RISE Project, highlighting the role of collaborative hardware-software efforts. It also opens the door to future performance work and deeper integration of RISC-V into the Python toolchain.
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Community contributions, including real-hardware testing from the RISE Project, drove the addition of RISC-V support to CPython.
The support is currently tier 3, with plans to improve testing via CI and to aim for tier 2 status in the future.
Future work includes architecture-specific optimizations and broader ecosystem efforts to make Python more robust on RISC-V platforms.
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The change is that CPython now lists RISC-V as an officially supported tier 3 platform in PEP 11. This follows several months of work where contributors tested on actual RISC-V hardware, fixed architecture-specific bugs, and improved the build system. The RISE Project supplied machines that acted as buildbots for ongoing testing.
Adopting this support requires engineers to have access to a RISC-V board or emulator and a suitable cross-compilation toolchain. Because the port is tier 3, CPython does not guarantee regular binary releases or full CI coverage, so users may encounter platform-specific issues that need manual workarounds.
Where the support may stop working is tied to the continued availability of test hardware and volunteer maintainers; the article notes that without ongoing real-machine testing the tier 3 status could lapse. It also points out that the current testing relies on periodic buildbots rather than immediate CI feedback.
Looking ahead, the maintainers plan to bring RISC-V runners into CPython’s CI for faster feedback, work toward promoting the port to tier 2, and explore ISA-specific optimizations. They also stress that wider ecosystem contributions, packages, compilers, tooling, will be needed for Python to become a first-class citizen on RISC-V.
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