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Sandisk and SK Hynix Publish First Open High Bandwidth Flash Standard
Sandisk and SK Hynix have published an open technical specification for High Bandwidth Flash, a new memory tier targeting AI inference systems.
The spec introduces a memory layer that can sit between HBM and SSDs, offering a potential cost-effective way to boost near-compute capacity for AI workloads. By leveraging the UCIe chiplet interface, it aims to ease integration with existing processors and accelerators.
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The specification defines capacities up to 512 gigabytes using 8-high or 16-high NAND stacks.
Bandwidth tiers range from about 0.4 terabytes per second to 3.0 terabytes per second.
Google and Tenstorrent participated in the effort, but no commercial products or independent benchmarks exist yet.
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What elseif makes of it.
Sandisk and SK Hynix released an open technical specification for High Bandwidth Flash through the Open Compute Project. The spec defines a new memory tier that sits between High Bandwidth Memory and conventional SSD storage. It is aimed at AI inference workloads that need more compute-side capacity without depending solely on costly HBM.
The specification allows capacities up to 512 gigabytes by using 8-high or 16-high NAND stacks. Bandwidth options span from roughly 0.4 terabytes per second to about 3.0 terabytes per second. These ranges are intended to give designers flexibility when balancing performance and cost.
HBF adopts the UCIe chiplet interface to simplify attachment to CPUs, GPUs, and other accelerators. Google and Tenstorrent contributed to the standardization work alongside the two memory vendors. The use of a chiplet interface is meant to reduce integration effort for system designers.
At this stage, no commercial HBF products have been announced and independent performance benchmarks are not yet available. The absence of shipped parts means the specification remains a reference for future hardware. Engineers will need to wait for actual devices before evaluating real-world trade-offs.
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