INFRA Signal 444
Waymo's custom 5nm robocar chip claims 1,000+ TOPS, replacing FPGAs
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Waymo's first custom AI accelerator for robocars, built on TSMC's 5nm process, claims over 1,000 TOPS and ultra-low latency, replacing Intel FPGAs.
This move from off-the-shelf FPGAs to custom ASICs signals a shift toward specialized hardware in autonomous vehicles. Engineers will need to weigh the benefits of lower latency and higher compute density against the loss of programmability and the cost of custom silicon. The redundancy design also underscores the reliability demands of safety-critical systems.
Written by elseif from the cluster below · every claim links back to a sourceThe three things worth knowing
Waymo's custom ASIC is built on TSMC's 5nm process and optimized for both convolutional neural networks and transformer models.
The chip claims over 1,000 TOPS of AI performance, likely at INT8 precision, putting it in the same ballpark as Nvidia's Drive AGX Thor.
Each vehicle is equipped with a pair of ASICs for redundancy, with liquid cooling from the vehicle's own coolant system.
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